Multidimensional fields of data processing cells are conventional. The generic class of these modules includes in particular systolic arrays, neural networks, multiprocessor systems, processors having a plurality of arithmetic units and/or logic cells and/or communicative/peripheral cells (IO), interconnection and network modules such as crossbar switches as well as known modules of the generic types FPGA, DPGA, Chameleon, XPUTER, etc. In particular, there are conventional modules in which first cells are reconfigurable during runtime without interfering with the operation of other cells (see, for example, the following patent applications, assigned to PACT XPP Technologies AG or its predecessor companies and/or of which Martin Vorbach is an inventor (hereinafter “PACT Technologies”): DE 44 16 881.0-53, DE 197 81 412.3, DE 197 81 483.2, DE 196 54 846.2-53, DE 196 54 593.5-53, DE 197 04 044.6-53, DE 198 80 129.7, DE 198 61 088.2-53, DE 199 80 312.9, PCT/DE00/01869, DE 100 36 627.9-33, DE 100 28 397.7, DE 101 10 530.4, DE 101 11 014.6, PCT/EP 00/10516, EP 01 102 674.7). These are herewith incorporated fully into the present text for disclosure purposes.
Modules designed in this way are high performance modules but their use is often prohibitive because of high costs. In cases where cost is particularly relevant in mass production, it is therefore customary at the present time to provide dedicated logic circuits in the form of ASICs and the like. However, these have the problem of entailing particularly high development costs because designing the circuit and manufacturing the plurality of masks are both expensive.